RegViz: Visualize WUPEN Bitfield

Renesas Electronics /R7FA6M1AD /ICU /WUPEN

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Interpret as WUPEN

RTCALMWUPEN=0, ACMPHS0WUPEN=0, IRQWUPEN11=0, IRQWUPEN0=0, IRQWUPEN12=0, IRQWUPEN13=0, IRQWUPEN1=0, IRQWUPEN8=0, IRQWUPEN4=0, IIC0WUPEN=0, IRQWUPEN5=0, LVD2WUPEN=0, LVD1WUPEN=0, AGT1CAWUPEN=0, IRQWUPEN2=0, IRQWUPEN9=0, RTCPRDWUPEN=0, AGT1UDWUPEN=0, USBFSWUPEN=0, IRQWUPEN10=0, IRQWUPEN3=0, USBHSWUPEN=0, IWDTWUPEN=0, AGT1CBWUPEN=0, KEYWUPEN=0, IRQWUPEN6=0, IRQWUPEN7=0

Description

Wake Up interrupt enable register

Fields

IRQWUPEN0	IRQ0 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ0 interrupt is disabled 1 (1): S/W standby returns by IRQ0 interrupt is enabled
IRQWUPEN1	IRQ1 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ1 interrupt is disabled 1 (1): S/W standby returns by IRQ1 interrupt is enabled
IRQWUPEN2	IRQ2 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ2 interrupt is disabled 1 (1): S/W standby returns by IRQ2 interrupt is enabled
IRQWUPEN3	IRQ3 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ3 interrupt is disabled 1 (1): S/W standby returns by IRQ3 interrupt is enabled
IRQWUPEN4	IRQ4 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ4 interrupt is disabled 1 (1): S/W standby returns by IRQ4 interrupt is enabled
IRQWUPEN5	IRQ5 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ5 interrupt is disabled 1 (1): S/W standby returns by IRQ5 interrupt is enabled
IRQWUPEN6	IRQ6 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ6 interrupt is disabled 1 (1): S/W standby returns by IRQ6 interrupt is enabled
IRQWUPEN7	IRQ7 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ7 interrupt is disabled 1 (1): S/W standby returns by IRQ7 interrupt is enabled
IRQWUPEN8	IRQ8 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ8 interrupt is disabled 1 (1): S/W standby returns by IRQ8 interrupt is enabled
IRQWUPEN9	IRQ9 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ9 interrupt is disabled 1 (1): S/W standby returns by IRQ9 interrupt is enabled
IRQWUPEN10	IRQ10 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ10 interrupt is disabled 1 (1): S/W standby returns by IRQ10 interrupt is enabled
IRQWUPEN11	IRQ11 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ11 interrupt is disabled 1 (1): S/W standby returns by IRQ11 interrupt is enabled
IRQWUPEN12	IRQ12 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ12 interrupt is disabled 1 (1): S/W standby returns by IRQ12 interrupt is enabled
IRQWUPEN13	IRQ13 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IRQ13 interrupt is disabled 1 (1): S/W standby returns by IRQ13 interrupt is enabled
Reserved	This bit is read as 0. The write value should be 0.
Reserved	This bit is read as 0. The write value should be 0.
IWDTWUPEN	IWDT interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IWDT interrupt is disabled 1 (1): S/W standby returns by IWDT interrupt is enabled
KEYWUPEN	Key interrupt S/W standby returns enable bit 0 (0): S/W standby returns by KEY interrupt is disabled 1 (1): S/W standby returns by KEY interrupt is enabled
LVD1WUPEN	LVD1 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by LVD1 interrupt is disabled 1 (1): S/W standby returns by LVD1 interrupt is enabled
LVD2WUPEN	LVD2 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by LVD2 interrupt is disabled 1 (1): S/W standby returns by LVD2 interrupt is enabled
Reserved	This bit is read as 0. The write value should be 0.
Reserved	This bit is read as 0. The write value should be 0.
ACMPHS0WUPEN	ACMPHS0 interrupt S/W standby returns enable bit 0 (0): S/W standby returns by ACMPHS0 interrupt is disabled 1 (1): S/W standby returns by ACMPHS0 interrupt is enabled
Reserved	This bit is read as 0. The write value should be 0.
RTCALMWUPEN	RTC alarm interrupt S/W standby returns enable bit 0 (0): S/W standby returns by RTC alarm interrupt is disabled 1 (1): S/W standby returns by RTC alarm interrupt is enabled
RTCPRDWUPEN	RCT period interrupt S/W standby returns enable bit 0 (0): S/W standby returns by RTC period interrupt is disabled 1 (1): S/W standby returns by RTC period interrupt is enabled
USBHSWUPEN	USBHS interrupt S/W standby returns enable bit 0 (0): S/W standby returns by USBHS interrupt is disabled 1 (1): S/W standby returns by USBHS interrupt is enabled
USBFSWUPEN	USBFS interrupt S/W standby returns enable bit 0 (0): S/W standby returns by USBFS interrupt is disabled 1 (1): S/W standby returns by USBFS interrupt is enabled
AGT1UDWUPEN	AGT1 underflow interrupt S/W standby returns enable bit 0 (0): S/W standby returns by AGT1 underflow interrupt is disabled 1 (1): S/W standby returns by AGT1 underflow interrupt is enabled
AGT1CAWUPEN	AGT1 compare match A interrupt S/W standby returns enable bit 0 (0): S/W standby returns by AGT1 compare match A interrupt is disabled 1 (1): S/W standby returns by AGT1 compare match A interrupt is enabled
AGT1CBWUPEN	AGT1 compare match B interrupt S/W standby returns enable bit 0 (0): S/W standby returns by AGT1 compare match B interrupt is disabled 1 (1): S/W standby returns by AGT1 compare match B interrupt is enabled
IIC0WUPEN	IIC0 address match interrupt S/W standby returns enable bit 0 (0): S/W standby returns by IIC0 address match interrupt is disabled 1 (1): S/W standby returns by IIC0 address match interrupt is enabled

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